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Electronic components have a wide range of failure modes. These can be classified in various ways, such as by time or cause. Failures can be externally utility generated, in-situ facility or locally generated by other nearby equipment or machinery, or internally generated from other related components in the circuitry. They can be caused by excess temperature, excess current or voltage, ionizing radiation, mechanical shock, stress or impact, parasitic structures, and many other causes. They can happen in an instant or take time to manifest. They can happen in storage, on manufacturing, in handling, packaging, shipping, installation, or during maintenance. In electronic semiconductor devices (LEDs), problems in the device package may cause failures due to contamination, mechanical stress of the device or open or short circuits.
Failures most commonly occur at near the beginning and near the ending of the lifetime of the parts, resulting in the bathtub curve graph of failure rates. Burn-in procedures are used to detect early failures.
Analysis of the statistical properties of failures can give guidance in designs to establish a given level of reliability. For example, power-handling may be greatly derated to obtain adequate service life; a part intended to run for years has different reliability requirements than a part intended to run for 6 months or a year.
A sudden fail-open fault in an inductive circuit can cause multiple secondary failures. A broken metallization (printed circuit board – PCBA – land) may cause secondary overvoltage damage. Thermal pads, Vias, and metalized plans can add capacitance and discharge paths to ground. Thermal runaway can cause sudden failures including melting, fire or explosions. Paint can add high resistance to paths needing electrical continuity. Any fault effects s can be cumulative or systemic where circuits feed other circuits.
Packaging Failures:
Many electronic parts failures are packaging-related. Packaging, as the barrier between electronic parts and the environment, is very susceptible to environmental factors. Thermal expansion produces mechanical stresses that may cause material fatigue. Humidity and aggressive chemicals can cause corrosion. Exceeding the allowed environmental temperature range can cause overstressing of wire bonds, thus tearing the connections loose, cracking the semiconductor dies, or causing packaging cracks. Humidity and subsequent high temperature heating may also cause cracking, as may mechanical damage or shock. During encapsulation, bonding wires can be severed, shorted, or touch the chip die, usually at the edge.
Contact Failures:
Soldered joints can fail in many ways like electro-migration. SMT leadless parts rely on the solder to absorb stresses. Thermal cycling may lead to fatigue cracking of the solder joints, especially with elastic solders; various approaches are used to mitigate such incidents. Loose particles, like bonding wire and weld flash, can form in the device cavity and migrate inside the packaging, causing often intermittent and shock-sensitive shorts. Cables may fail by fraying and fire damage.
Printed circuit board failures
Printed circuit boards (PCBs) are vulnerable to environmental influences; for example, the traces are corrosion-prone and may be improperly etched leaving partial shorts, while the vias may be insufficiently plated through or filled with solder. The traces may crack or make poor contact under mechanical loads, often resulting in unreliable PCB operation.
Residues of solder flux may facilitate corrosion; those of other materials on PCBs can cause electrical leaks. Polar covalent compounds can attract moisture like antistatic agents, forming a thin layer of conductive moisture between the traces.
Vias are a common source of unwanted serial resistance. Mousebites are regions where metallization has a decreased width; such defects usually do not show during electrical testing but present a major reliability risk. Increased current density in the mousebite can aggravate electro-migration problems;
Conductive anodic filaments (CAFs) may grow within the boards along the fibers of the composite material. Metal is introduced to a vulnerable surface typically from plating the vias, then migrates in presence of ions, moisture, and electrical potential; drilling damage and poor glass-resin bonding promotes such failures.
The difference in thermal expansion of the fibers and the matrix weakens the bond when the board is soldered; the lead-free solders which require higher soldering temperatures increase the occurrence of CAFs.
Semiconductor (LED and MOSFET) failures
Many failures result in generation of hot electrons. These are observable under an optical microscope. Examples of semiconductor failures include accumulation of charge carriers trapped in the gate oxide of MOSFETs. This introduces permanent gate biasing, influencing the transistor's threshold voltage; it may be caused by hot carrier injection, ionizing radiation, or nominal use.
Metallisation failures
Metallization failures are more common and serious causes of FET transistor degradation than material processes; Mechanical stresses, high currents, and corrosive environments forming of whiskers and short circuits. These effects can occur both within packaging and on circuit boards.
Electrical overstress (EOS)
Most stress-related semiconductor failures are electro-thermal in nature microscopically; locally increased temperatures can lead to immediate failure by melting or vaporizing metallization layers, melting the semiconductor or by changing structures. Diffusion and electro-migration tend to be accelerated by high temperatures, shortening the lifetime of the device; damage to junctions not leading to immediate failure may manifest as altered current-voltage characteristics of the junctions. Electrical overstress failures can be classified as thermally-induced, electro-migration-related and electric field-related failures; examples of such failures include:
Thermal runaway, where localized loss of thermal conductivity, leads to damage producing more heat;
Reverse bias. Some semiconductor devices are diode junction-based (LEDs) and are nominally rectifiers; however, the reverse-breakdown mode may be at a very low voltage, with a moderate reverse bias voltage causing immediate degradation and vastly accelerated failure.
Severely overloaded Zener diodes (used to protect LEDs from over voltage stress) in reverse bias shorting. A sufficiently high voltage causes avalanche breakdown of the Zener junction; that and a large current being passed through the diode causes extreme localized heating, melting the junction and metallization and forming a silicon-aluminum alloy that shorts the terminals.
Ground loops
In an electrical system, a ground loop usually refers to a current, almost always unwanted, in a conductor connecting two points that are supposed to be at the same potential, often ground, but are actually at different potentials. Ground loops, created by improperly designed or improperly installed equipment, can also create an electric shock hazard, since ostensibly "grounded" parts of the equipment, which are often accessible to users, are not at ground potential.
A ground loop in a system which connects circuits designed to be at the same potential but which are actually at different potentials can be hazardous, or cause problems with the electrical system, because the electrical potential and soil resistance at different points on the surface of the earth can vary.
Ground and ground loops are important in designing circuits. In many circuits, large currents may exist through the ground plane, leading to voltage differences of the ground reference in different parts of the circuit, leading other problems.
In a floating ground system (class2), that is, one not connected to earth, the voltages will probably be unstable, and if some of the conductors that constitute the return circuit to the source have a relatively high resistance, or have high currents through them that produce a significant voltage (I·R) drop, they can be hazardous.
Although they occur most often in the ground conductors of electrical equipment, ground loops can occur wherever two or more circuits share a common conductor or current path.
Electrostatic discharge (ESD)
Electrostatic discharge is a subclass of electrical overstress and may cause immediate device failure, permanent parameter shifts and latent damage causing increased degradation rate. It has at least one of three components, localized heat generation, high current density and high electric field gradient; prolonged presence of currents of several amperes transfer energy to the device structure to cause damage.
Catastrophic ESD failure modes include:
Junction burnout, where a conductive path forms through the junction and shorts it
Metallization burnout, where melting or vaporizing of a part of the metal interconnect interrupts it
Oxide punch-through, formation of a conductive path through the insulating layer between two conductors or semiconductors; the gate oxides are thinnest and therefore most sensitive. The damaged transistor (MOSFET) shows a low-ohmic junction between gate and drain terminals.
A parametric failure only shifts the device parameters and may manifest in stress testing; sometimes, the degree of damage can lower over time.
Latent ESD failure modes occur in a delayed fashion and include:
Insulator damage by weakening of the insulator structures.
Junction damage by lowering minority carrier lifetimes, increasing forward-bias resistance and increasing reverse-bias leakage.
Metallization damage by conductor weakening.
Catastrophic failures require the highest discharge voltages, are the easiest to test for and are rarest to occur. Parametric failures occur at intermediate discharge voltages and occur more often, with latent failures the most common. For each parametric failure, there are 4–10 latent ones.
The gate oxide of some MOSFETs can be damaged by 50 volts of potential, the gate isolated from the junction and potential accumulating on it causing extreme stress on the thin dielectric layer; stressed oxide can shatter and fail immediately. The gate oxide itself does not fail immediately but can be accelerated by stress induced leakage current, the oxide damage leading to a delayed failure after prolonged operation hours; on-chip capacitors using oxide or nitride dielectrics are also vulnerable. Smaller structures are more vulnerable because of their lower capacitance, meaning the same amount of charge carriers charges the capacitor to a higher voltage. All thin layers of dielectrics are vulnerable; hence, chips made by processes employing thicker oxide layers are less vulnerable.
Current-induced failures are more common PN junctions are predominant (LEDs). The high power of the discharge, above 5 kilowatts for less than a microsecond, can melt and vaporize materials.
Capacitors
Capacitors are characterized by their capacitance, parasitic resistance in series and parallel, breakdown voltage and dissipation factor; structurally, capacitors consist of electrodes separated by a dielectric, connecting leads, and housing; deterioration of any of these may cause parameter shifts or failure. Shorted failures and leakage due to increase of parallel parasitic resistance are the most common failure modes of capacitors, followed by open failures. One common example of capacitor failures includes overvoltage or aging of the dielectric, occurring when breakdown voltage falls below operating voltage.
In addition to the problems listed above, electrolytic capacitors suffer from failures when power dissipation by high ripple currents and internal resistances cause an increase of the capacitor's internal temperature beyond specifications, accelerating the deterioration rate; such capacitors usually fail short.
Metal oxide varistors
Metal oxide varistors typically have lower resistance as they heat up; if connected directly across a power bus, for protection against electrical transients, a varistor with a lowered trigger voltage can slide into catastrophic thermal runaway and sometimes a small explosion or fire. To prevent this, the fault current is typically limited by a thermal fuse, circuit breaker, or other current limiting device.
Reliability of semiconductor devices can be summarized as follows:
Semiconductor devices are very sensitive to impurities and particles. Therefore, to manufacture these devices it is necessary to manage many processes while accurately controlling the level of impurities and particles.
The problems of micro-processes, and thin films and must be fully understood as they apply to metallization and bonding wire bonding. It is also necessary to analyze surface phenomena from the aspect of thin films.
Reliability of semiconductor devices may depend on assembly, use, and environmental conditions. Stress factors affecting device reliability include gas, dust, contamination, voltage, current density, temperature, humidity, mechanical stress, vibration, shock, radiation, pressure, and intensity of magnetic and electrical fields.
Summary
Design factors affecting semiconductor reliability include: voltage derating, power derating, current derating, meta-stability, temperature derating, and process control.
Failure mechanisms of electronic semiconductor devices fall in the following:
Categories
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Material-interaction-induced mechanisms.
Stress-induced mechanisms.
Mechanically induced failure mechanisms.
Environmentally induced failure mechanisms.
Material-interaction-induced mechanisms
Field-effect transistor gate-metal sinking
Ohmic contact degradation
Channel degradation
Surface-state effects
Package molding contamination—impurities in packaging compounds cause electrical failure
Stress-induced failure mechanisms
Electro-migration – electrically induced movement of the materials in the chip
Burnout – localized overstress
Hot Electron Trapping – due to overdrive in power RF circuits
Electrical Stress – Electrostatic discharge, High Electro-Magnetic Fields (HIRF), Latch-up overvoltage, overcurrent
Mechanically induced failure mechanisms
Die fracture – due to mis-match of thermal expansion coefficients
Die-attach voids – manufacturing defect—screenable with Scanning Acoustic Microscopy.
Solder joint failure by creep fatigue or intermetallic cracks.
Environmentally induced failure mechanisms
Humidity effects – moisture absorption by the package and circuit
Hydrogen effects – Hydrogen induced breakdown of portions of the circuit (Metal)
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